Senior FPGA Development Engineer- CSI Azure at Microsoft
Senior FPGA Development Engineer- CSI Azure Details
Feb. 25, 2019, 7:25 p.m.
large design team ASIC IP design
Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technologies that change our world. Microsoft is seeking a highly motivated, FPGA and ASIC IP design engineer to help build innovative FPGA-based computing systems within a large design team. Well-designed hardware can deliver huge amounts of fine-grained parallelism; therefore, provide a very fast infrastructure and significantly accelerate many types of computations. Microsoft products touch the lives of millions of users daily. This opportunity provides a great channel for product impact at the cutting edge of high-performance computing. Candidates should have FPGA and system accelerator development expertise as you will develop solutions for Microsoft's next generation of cloud servers and applications. The candidate will be contributor on a team developing IP for both FPGAs and ASICs. The successful candidate will be a strong communicator, creative, a critical thinker, and able to
Work with application groups to define, architect, develop, verify, and release IP logic blocks Integrate and debug 3rd party IP blocks Lab debug, hardware validation, and internal user support Deploy and maintain acceleration solutions to meet significant reliability and service level requirements Work in a team of hardware and software engineers to deploy working systems to a very large user base
A solid computer engineering background (MS in electrical and/or computer engineering or equivalent degree preferred, BS required) 5+ years of experience with hardware/systems design and development of FPGA or ASIC solutions Hardware design expertise using Verilog, System Verilog (VHDL acceptable) and HLS tools Programming and scripting in C, C++, C#, OpenCL, System C, Powershell and/or Perl Experience working in a team environment, coaching and mentoring team members Expertise in compilation flows and/or FPGA CAD tool development a plus Desired skills and experience: FPGA development environment