Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsoft is seeking a highly motivated, FPGA and ASIC IP design engineering manager to build innovative FPGA-based computing systems within a large design team. Well designed hardware can deliver huge amounts of fine-grained parallelism and, therefore, significantly accelerate many types of computations as well as provide very fast infrastructure. Microsoft provides a great channel for product impact that touches the lives of millions of users daily, in an environment at the cutting edge of high-performance computing. Seeking a personable, energetic candidate to manage, grow and mentor a group of eight or more engineers. The group will include a broad range of experience levels and will focus on developing an FPGA Shell (hardware abstraction layer) on FPGAs for Microsoft's next generation of cloud servers and applications. A strong candidate will be creative,
Manage, grow, and mentor a Shell RTL team Work with application groups to define, architect, develop, verify, and release RTL blocks Integrate and debug 3rd party IP blocks Work in a team of hardware and software engineers to deploy working systems to a very large user base.
A solid computer engineering background (MS in electrical and/or computer engineering or equivalent degree preferred, BS required.). At least eight years of experience with hardware/systems design and development of FPGA or ASIC solutions. At least two years of management experience Hardware design expertise using Verilog, System Verilog. Experience working in a team environment. Experience in compilation flows and/or FPGA CAD tool development a plus. Desired skills and experience: FPGA design and implementation tools expertise Programming and scripting in C, C++, C#, OpenCL, System C, Powershell