Job Details
Posted date: Aug 07, 2025
There have been 4 jobs posted with the title of Senior Design Verification Engineer all time at Microsoft.Category: Hardware Engineering
Location: Mountain View, California
Estimated salary: $188,900
Range: $119,800 - $258,000
Employment type: Full-Time
Travel amount: 25.0%
Work location type: Up to 50% work from home
Role: Individual Contributor
Description
Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission.As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the AISiE team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.
We are looking for a Senior Design Verification Engineer to join the team.
Establish yourself as an integral member of a design verification team for the development of AI components with focus on verifying functions and features. Lead a pre-silicon verification team for the development of custom Intellectual Property (IP) and Subsystem (SS) components with focus on architectural and micro-architectural based functions and features. Collaborate with the architecture and design teams to ensure the implementation meets both architectural and micro-architectural intent. Write, execute, enhance, and debug constrained random stimulus, scoreboards and checkers, and assertions to verify design correctness. Develop Universal Verification Methodology (UVM) components to interface between test code and verification simulation environments. Apply Agile development methodologies including code reviews, sprint planning, and feature deployment. Provide technical leadership through mentorship and teamwork. Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion.
Qualifications
Required Qualifications:Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR equivalent experience. 4+ years of industry experience in design verification with a delivering complex Application Specific Integrated Circuits(ASIC) or System on Chip(SOC).
Other requirements:
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Additional Qualifications:
8+ years of industry experience in design verification with a proven track record of delivering complex Central Processing Unit(CPU), Graphics Processing Unit(GPU) or System on Chip(SoC) IPs. Demonstrated experience in one or more of the following: interconnect fabrics, Network on Chip(NOCs), AXI-4 protocol base other complex IP/blocks or subsystems. Experience with IP/SOC verification for a full product cycle from definition to silicon, including writing IP/block or subsystem level architecting DV environment, estimating efforts, test plans, developing tests, debugging failures and coverage signoff. Experience of working on AI/Machine Learning (ML)SoCs In depth knowledge of verification and debug principles, testbenches, Universal Verification Methodology (UVM) or C based test environments. Working knowledge of writing assertions, coverage and / or formal verification. Knowledge of industry standard bus interfaces such as Advanced Microcontroller Bus Architecture (AMBA) Advanced eXtensible Interface (AXI) protocols. Background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments. Scripting languages such as Zsh, Bash, Python or Perl. Proficient communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams within Microsoft and with external vendors.
Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $158,400 - $258,000 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: US corporate pay information | Microsoft Careers
Microsoft will accept applications for the role until August 21st 2025.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form.
Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.
#SCHIE
Check out other jobs at Microsoft.